detsim::SimWireAna Class Reference

Base class for creation of raw signals on wires. More...

Inheritance diagram for detsim::SimWireAna:

Public Member Functions
	SimWireAna (fhicl::ParameterSet const &pset)
void	analyze (const art::Event &evt)
	read/write access to event More...
void	beginJob ()

Private Attributes
std::string	fDetSimModuleLabel
	name of module that produced the digits More...
TH1F *	fDiffs
	histogram of Raw tdc to tdc differences More...
TH1F *	fCompressErr
TH1F *	fCompressFactor
	compression factor More...
TH2F *	fRawVsCompress
	histogram of original tdc value vs compressesed value More...
TH2F *	fCompressErr2D
	histogram of original tdc value vs compressesed value More...

Detailed Description

Base class for creation of raw signals on wires.

Definition at line 36 of file SimWireAna_module.cc.

Constructor & Destructor Documentation

detsim::SimWireAna::SimWireAna ( fhicl::ParameterSet const &  pset )

explicit

Definition at line 66 of file SimWireAna_module.cc.

    : EDAnalyzer(pset)
    , fDetSimModuleLabel{pset.get< std::string >("DetSimModuleLabel")}
  {}

Member Function Documentation

void detsim::SimWireAna::analyze

(

const art::Event &

evt

)

read/write access to event

loop over all the raw digits

Definition at line 89 of file SimWireAna_module.cc.

  {

    // loop over the raw digits and get the adc vector for each, then compress it and uncompress it

    art::Handle< std::vector<raw::RawDigit> > rdHandle;
    evt.getByLabel(fDetSimModuleLabel,rdHandle);

    art::PtrVector<raw::RawDigit> rdvec;
    for(unsigned int i = 0; i < rdHandle->size(); ++i){
      art::Ptr<raw::RawDigit> r(rdHandle,i);
      rdvec.push_back(r);
    }

    /// loop over all the raw digits
    for(unsigned int rd = 0; rd < rdvec.size(); ++rd){

      std::vector<short> adc;
      std::vector<short> uncompressed(rdvec[rd]->Samples());
      for(unsigned int t = 1; t < rdvec[rd]->Samples(); ++t){
        fDiffs->Fill(rdvec[rd]->ADC(t) - rdvec[rd]->ADC(t-1));
        adc.push_back(rdvec[rd]->ADC(t-1));
      }

      //get the last one for the adc vector
      adc.push_back(rdvec[rd]->ADC(rdvec[rd]->Samples()-1));

      raw::Compress(adc, raw::kHuffman);

      fCompressFactor->Fill((1.*adc.size())/(1.*rdvec[rd]->Samples()));

      raw::Uncompress(adc, uncompressed, raw::kHuffman);

      if(uncompressed.size() != rdvec[rd]->Samples()){
        cet::exception("WrongSizeUncompress")
          << "uncompression does not produce same size vector as original: "
          << "original = " << rdvec[rd]->Samples() << " uncompress = "
          << uncompressed.size() << "\n";
      }

      for(unsigned int t = 0; t <  uncompressed.size(); ++t){
        //std::cout << t << " " << rdFE->ADC(t) << " " << uncompressed[t] << std::endl;
        if(uncompressed[t]-rdvec[rd]->ADC(t) > 1)
          mf::LogWarning("SimWireAna") << "problem with event "
                                       << " time " << t << " ADC " << rdvec[rd]->ADC(t)
                                       << " uncompress " << uncompressed[t]
                                       << " channel " << rdvec[rd]->Channel();

        fCompressErr->Fill(uncompressed[t]-rdvec[rd]->ADC(t));
        fCompressErr2D->Fill(rdvec[rd]->ADC(t), uncompressed[t]-rdvec[rd]->ADC(t));
        fRawVsCompress->Fill(rdvec[rd]->ADC(t), uncompressed[t]);
      }
    }//end loop over digits

    return;
  }//end analyze method

void detsim::SimWireAna::beginJob

(

)

Definition at line 72 of file SimWireAna_module.cc.

  {
    // get access to the TFile service
    art::ServiceHandle<art::TFileService const> tfs;

    fDiffs          = tfs->make<TH1F>("One timestamp diffs", ";#Delta ADC;",        40,   -19.5,  20.5);
    fCompressErr    = tfs->make<TH1F>("compressErr",         ";Raw-Compressed;",    1000, -495.5, 500.5);
    fCompressFactor = tfs->make<TH1F>("compressFactor",      ";Compression;",       500,     0.,    1.);

    fCompressErr2D  = tfs->make<TH2F>("compressErr2D",       ";Raw;Raw-Compressed", 100, -50., 50., 1000,  -495.5, 500.5);
    fRawVsCompress  = tfs->make<TH2F>("rawVsCompress",       ";Raw;Compressed",     100, -50., 50.,  100,   -50.,  50.);

    return;

  }

Member Data Documentation

TH1F* detsim::SimWireAna::fCompressErr

private

histogram of difference between original tdc value and compressesed value

Definition at line 51 of file SimWireAna_module.cc.

TH2F* detsim::SimWireAna::fCompressErr2D

private

histogram of original tdc value vs compressesed value

Definition at line 56 of file SimWireAna_module.cc.

TH1F* detsim::SimWireAna::fCompressFactor

private

compression factor

Definition at line 53 of file SimWireAna_module.cc.

std::string detsim::SimWireAna::fDetSimModuleLabel

private

name of module that produced the digits

Definition at line 48 of file SimWireAna_module.cc.

TH1F* detsim::SimWireAna::fDiffs

private

histogram of Raw tdc to tdc differences

Definition at line 49 of file SimWireAna_module.cc.

TH2F* detsim::SimWireAna::fRawVsCompress

private

histogram of original tdc value vs compressesed value

Definition at line 55 of file SimWireAna_module.cc.

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The documentation for this class was generated from the following file:

• SimWireAna_module.cc